Rui Su Yingke Zynq 7015 core board driven formula electric car wins the FS competition
ynq 7015 core board Formula racing
Formula Student is the world's largest engineer competition. Thanks to an innovative electric drive system based on FPGA modules, the AMZ student team in Zurich, Switzerland successfully won the competition. The AMZ team’s car is equipped with 4 inverters based on Enclustra Mercury ZX5 core board (based on Xilinx Zynq 7015 SoC), creating the fastest lap time.
There are 18 races each year in the Formula College Student Competition, with more than 600 student teams participating. The AMZ (Akademischer Motorsportverein Zürich) racing team is composed of students from the Swiss Federal Institute of Technology Zurich and the Swiss University of Applied Sciences Lucerne. In the history of this event for more than ten years, due to the continuous improvement of concepts and the introduction of innovations, such as the use of FPGA core board modules To control the electric drive motor, it created a world record for an electric car to accelerate from 0 to 100 km/h in 1.513 seconds. In order to ensure competitiveness, the various components of the racing car must be coordinated and integrated into a reliable high-performance system. AMZ has developed most of the components by itself to achieve this.
The goal of racing Eiger (all cars are named after the Swiss mountains) is to get as many points as possible in the race, which is achieved by reaching the fastest lap time. Through lap speed simulation, energy calculation and log data analysis of the past few seasons, AMZ decided to adopt a purely customized four-wheel drive system, carbon fiber reinforced polymer (CFRP) single-storage structure, computational fluid dynamics (CFD), and verified by wind The aviation assembly and hydraulic suspension.
Inverter based on FPGA core board
In the history of AMZ, this is the first time that the team has developed all the components of the power system by itself. Finally, the inverter was developed, based on Enclustra's FPGA core board. The inverter converts the direct current of the lithium battery into three-phase alternating current to run the permanent magnet synchronous motor.
Four self-developed inverters each control one motor; one self-developed direct torque control (DTC) modulator runs on Enclustra Mercury ZX5 core board (based on Xilinx Zynq 7015 system-on-chip). VHDL makes it possible to estimate the current motor current and calculate the new switch position every 10 nanoseconds-this is impossible with a microcontroller or DSP-based system.
The customized 1200 volt SiC MOSFET module has an on-resistance of only 10 milliohms. It adopts a self-developed smart gate driver and uses 3D printed cooling fins for water cooling, which reduces conduction and switching losses, improves switching speed, and reduces rise time To 39 nanoseconds. Two additional 47 nanofarad DC connection capacitors on the core board can reduce the power loop inductance. A hybrid DC circuit with 6 microfarad Ceralink ceramic capacitors and 240 microfarad film capacitors is used to reduce weight and reduce DC link voltage ripple. The two PCBs are designed with 1 mm copper inlets for the connection of the traction system to reduce the area of the circuit board. In order to control the motor, the measurement of three-phase current, DC connection voltage and current, and phase-to-phase voltage is up to 1 million samples per second. A resolver is used to determine the current position of the motor. Gigabit Ethernet and CAN connections ensure fast and safe communication between the car and the test bench. For the highest degree of customization, the entire inverter software is developed in-house.
Enclustra (Ruisu Yingke) Mercury Mercury ZX5 SoC core board
The processing unit chose System-on-Chip (SoC). In most cases, bare SoC is packaged in BGA, which is difficult to solder and requires multiple layers of PCB to lead the signal to the chip. SoC also needs many peripherals, such as memory, clock, interface, and complex power supply. The Enclustra Mercury ZX5 SoC core board provides all the above functions on a small PCB. The core board contains 1GB DDR3L SDRAM, 512MB Nand Flash, an Ethernet PHY and a power supply for all voltages. The core board can even supply power to the circuits on the backplane, minimizing the need for power converters.
Abundant computing power
Because of the need for very low latency and high refresh rate, the modulator and all communications with peripherals are implemented on FPGA. All key safety functions are implemented on FPGA, the delay time of overcurrent protection is at most 1 microsecond, and the delay time of overvoltage protection is at most 2 microseconds. A multi-layer redundant safety system is implemented on the FPGA and the processor. The processor and the FPGA monitor each other and shut down the inverter when inconsistencies occur.
Some advanced controls, such as speed control and traction control, are implemented on one core of the ARM Cortex-A9 processor; the other core is responsible for communicating with the vehicle control unit (VCU) or control computer, and is responsible for data recording.
High bandwidth interface
The compiled firmware and bitstream are copied to the SD card and inserted into the inverter backplane. At startup, the bootloader copies the firmware into memory and loads the bitstream into the FPGA structure.
FPGA processes all current measurements at a sampling rate of 1 million per second (1MSps), and processes voltage measurements at a rate of 500,000 per second (500 kSps). These components are accessed through an SPI-based protocol. The motor position is measured by a resolver with a 33 kSps parallel interface. In addition to being used directly by the modulator, data is transmitted to the processor via the integrated AXI PL-PS interconnect. Using this technology, the processor can simply change the configuration data and read the value of the FPGA through memory access instructions.
In addition, you can also directly access the DDR3 RAM of the Mercury ZX5 core board from the FPGA structure. In this way, a large amount of log data can be transferred to RAM without using a processor. Then, the data is stored to the SD card for offline analysis before the inverter is shut down.
The temperature of the semiconductor and output filter is measured with the built-in XADC of the SoC and used directly on the processor. In the car, the inverter is directly connected to the processing system through the CAN interface and the VCU. In order to run the inverter on the test bench and connect it to the computer, an Ethernet interface is used.
Simplified power supply
The Mercury ZX5 core board is powered by a single 5~15V power supply. The on-board DC/DC converter provides all internal voltages, and the voltage converted on the board is also led to the connector. These 3.3V and 1.8V are used to power the analog and digital circuits on the inverter backplane. Because the above-mentioned power supply has been provided, the work required for the power supply is minimized when the user develops the core board based on Enclustra.
Extensive design support
In order to simplify the integration of its modules, Enclustra provides all necessary hardware, software and supporting materials, in addition to user manuals, schematics, 3D models, PCB packaging and differential I/O length tables, and detailed documents And the reference design makes it easy to get started. Because of this, the risk of pin calibration errors is minimized.
The Enclustra Build Environment (EBE) can be used to compile the Enclustra SoC core board integrated with the ARM processor, which is very smooth. The core board and backplane are selected through the graphical interface; after that, EBE downloads the appropriate bitstream, the first stage boot loader (FSBL) and the required source code; finally compiles U-Boot, Linux and the root file based on BusyBox system.
With Enclustra's free module configuration tool (Module Configuration Tool, MCT), the core board and backplane can be configured via USB without any additional hardware. Through the USB connector on the bottom board, users can program the FPGA core SPI Flash of the core board, read the EEPROM of the core board, and configure peripherals. Any problems encountered by AMZ during the development of the inverter can be quickly resolved with the support of Enclustra.
The evolution of the next generation of racing
The new inverter of AMZ's next-generation racing Mythen is once again based on the Enclustra Mercury ZX5 core board. With this new type of inverter, the optical fiber connection between the two Mercury ZX5 core boards is realized in the racing car. For this, gigabit transceivers are used. The smaller Mars Mars ZX2 core board has also been evaluated by AMZ, but its I/O number does not meet the demand.
The concept of Mythen drive system has changed from 4 inverters (1 inverter controlling 1 motor/wheel) to 2 inverters (each inverter controlling 2 motors). Because of this new concept, many auxiliary circuits can be combined, the complexity is reduced, and some valuable space is saved. In addition, it opens up the possibility of implementing more advanced control algorithms that act on multiple motors.
About Formula Student
The Formula University Student Competition is the world's largest engineer competition, which started in 1981. The purpose of the competition is to introduce future engineers to the development, production, assembly, testing and competition of electric or oil-powered racing cars within one year. The winner is not necessarily the team with the fastest car, but the team with the best combination in terms of structure, performance, financial planning and sales arguments. In 2010, in order to train potential young engineers, prepare for future technologies (such as electric drive systems), and promote the innovation process, the competition committee also opened a separate competition unit for electric vehicles.
Enclustra is one of the world's leading companies in the FPGA field. It was established in Switzerland in 2004 and became an official partner of Xilinx. It is also an Intel FPGA gold solution provider and Lattice official solution provider, providing FPGA core boards/development boards, FPGA IP cores, and full stacks. Design services, currently serving 1600+ customers in 70+ countries around the world. In 2019, it officially entered the Chinese market and established a wholly-owned subsidiary Ruisu Yingke (Shenzhen) Technology Co., Ltd. At the beginning of its establishment, a local engineer team was established to bring better localized support and services to Chinese customers.